LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches

Please use this identifier to cite or link to this item: http://ir.sinica.edu.tw/handle/201000000A/36331

Title:	LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches
Authors:	Hsiang-Yun Cheng Jishen Zhao Jack Sampson Mary Jane Irwin Aamer Jaleel Yu Lu Yuan Xie
Issue Date:	2016-06-18
Conference:	ACM/IEEE International Symposium on Computer Architecture (ISCA) (Seoul, South Korea : ACM/IEEE)
URI:	http://ir.sinica.edu.tw/handle/201000000A/36331
URL:	http://ieeexplore.ieee.org/document/7551386/?reload=true
Appears in Collections:	資訊科技創新研究中心

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