TAP: Reducing the Energy of Asymmetric Hybrid Last-Level Cache via Thrashing Aware Placement and Migration

Please use this identifier to cite or link to this item: http://ir.sinica.edu.tw/handle/201000000A/77488

Title:	TAP: Reducing the Energy of Asymmetric Hybrid Last-Level Cache via Thrashing Aware Placement and Migration
Authors:	Jing-Yuan Luo Hsiang-Yun Cheng Ing-Chao Lin Da-Wei Chang
Issue Date:	2019-12-01
Relation:	IEEE TRANSACTIONS ON COMPUTERS 68(12), 1704-1719
URI:	http://ir.sinica.edu.tw/handle/201000000A/77488
ISSN:	http://gateway.isiknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=Drexel&SrcApp=hagerty_opac&KeyRecord=0018-9340&DestApp=JCR&RQ=IF_CAT_BOXPLOT
URL:	https://ieeexplore.ieee.org/document/8716297
Appears in Collections:	資訊科技創新研究中心

Show full item record

Last Week
0

Last month
0

checked on Jan 4, 2023

Check