TAP: Reducing the Energy of Asymmetric Hybrid Last-Level Cache via Thrashing Aware Placement and Migration

請用此 Handle URI 來引用此文件： http://ir.sinica.edu.tw/handle/201000000A/77488

題名:	TAP: Reducing the Energy of Asymmetric Hybrid Last-Level Cache via Thrashing Aware Placement and Migration
作者:	Jing-Yuan Luo Hsiang-Yun Cheng Ing-Chao Lin Da-Wei Chang
公開日期:	2019-12-01
關聯:	IEEE TRANSACTIONS ON COMPUTERS 68(12), 1704-1719
URI:	http://ir.sinica.edu.tw/handle/201000000A/77488
ISSN:	http://gateway.isiknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=Drexel&SrcApp=hagerty_opac&KeyRecord=0018-9340&DestApp=JCR&RQ=IF_CAT_BOXPLOT
URL:	https://ieeexplore.ieee.org/document/8716297
顯示於：	資訊科技創新研究中心

顯示文件完整紀錄

上周
0

上個月
0

checked on 2023/1/4

檢查

TAIR相關文章