http://ir.sinica.edu.tw/handle/201000000A/34709
Title: | Utilizing Sub-5 nm Sidewall Electrode Technology for Atomic-Scale Resistive Memory Fabrication |
Authors: | Kai-Shin Li ChiaHua Ho Ming-Taou Lee Min-Cheng Chen Cho-Lun Hsu J. M. Lu C. H. Lin C. C. Chen B. W. Wu Y. F. Hou C. Yi. Lin Y. J. Chen T. Y. Lai M. Y. Li I. Yang C. S. Wu Fu-Liang Yang |
Issue Date: | 2014-06-09 |
Conference: | Symposium on VLSI Technology (HONOLULU, USA : IEEE) |
URI: | http://ir.sinica.edu.tw/handle/201000000A/34709 |
Appears in Collections: | 應用科學研究中心 |
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