Issue Date | Title | Author(s) | Relation | scopus | WOS | Fulltext/Archive link |
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2015 | Low-Cost and TSV-free Monolithic 3D-IC with Heterogeneous Integration of Logic, Memory and Sensor Analogy Circuitry for Internet of Things | Tsung-Ta Wu; Chang-Hong Shen; Jia-Min Shieh; Wen-Hsien Huang; Hsing-Hsiang Wang; Fu-Kuo Hsueh; Hisu-Chih Chen; Chih-Chao Yang; Tung-Ying Hsieh; Bo-Yuan Chen; Yu-Shao Shiao; Chao-Shun Yang; Guo-Wei Huang; Kai-Shin Li; Ting-Jen Hsueh; Chien-Fu Chen; Wei-Hao Chen; Fu-Liang Yang; Meng-Fan Chang; Wen-Kuan Yeh | ||||
2019 | Scalable fabrication of a complementary logic inverter based on MoS2 fin-shaped field effect transistors | Yann-Wen Lan; Po-Chun Chen; Yun-Yan Lin; Ming-Yang Li; Lain-Jong Li; Yu-Ling Tu; Fu-Liang Yang ; Min-Cheng Chen; Kai-Shin Li | Nanoscale Horizons 4(3), 683-688 | |||
2015 | Sub-60mV-Swing Negative-Capacitance FinFET without Hysteresis | Kai-Shin Li; Pin-Guang Chen; Tung-Yan Lai; Chang-Hsien Lin; Cheng-Chih Cheng; Chun-Chi Chen; Yun-Jie Wei; Yun-Fang Hou; Ming-Han Liao; Min-Hung Lee; Min-Cheng Chen; Jia-Min Sheih; Wen-Kuan Yeh; Fu-Liang Yang; Sayeef Salahuddin; Chenming Hu | ||||
2015 | TMD FinFET with 4 nm Thin Body and Back Gate Control for Future Low Power Technology | Min-Cheng Chen; Kai-Shin Li; Lain-Jong Li; Ang-Yu Lu; Ming-Yang Li; Yung-Huang Chang; Chang-Hsien Lin; Yi-Ju Chen; Yun-Fang Hou; Chun-Chi Chen; Bo-Wei Wu; Cheng-San Wu; Ivy Yang; Yao-Jen Lee; Jia-Min Shieh; Wen-Kuan Yeh; Jyun-Hong Shih; Po-Cheng Su; Angada B. Sachid; Tahui Wang; Fu-Liang Yang; Chenming Hu | ||||
2014 | Utilizing Sub-5 nm Sidewall Electrode Technology for Atomic-Scale Resistive Memory Fabrication | Kai-Shin Li; ChiaHua Ho; Ming-Taou Lee; Min-Cheng Chen; Cho-Lun Hsu; J. M. Lu; C. H. Lin; C. C. Chen; B. W. Wu; Y. F. Hou; C. Yi. Lin; Y. J. Chen; T. Y. Lai; M. Y. Li; I. Yang; C. S. Wu; Fu-Liang Yang |