Issue Date | Title | Author(s) | Relation | scopus | WOS | Fulltext/Archive link |
---|---|---|---|---|---|---|
2022 | DL-RSIM: A Reliability and Deployment Strategy Simulation Framework for ReRAM-based CNN Accelerators | Wei-Ting Ling; Hsiang-Yun Cheng ; Chia-Lin Yang; Meng-Yao Lin; Kai Lien; Han-Wen Hu; Hung-Sheng Chang; Hsiang-Pang Li; Meng-Fan Chang; Yen-Ting Tsou; Chin-Fu Nien | ACM Transactions on Embedded Computing Systems (TECS) 21(3), 24 | |||
2018 | DL-RSIM: a simulation framework to enable reliable ReRAM-based accelerators for deep learning | Meng-Yao Lin; Hsiang-Yun Cheng; Wei-Ting Lin; Tzu-Hsien Yang; I-Ching Tseng; Chia-Lin Yang; Han-Wen Hu; Hung-Sheng Chang; Hsiang-Pang Li; Meng-Fan Chang | ||||
2022 | Efficient Bad Block Management with Cluster Similarity | Jui-Nan Yen; Yao-Ching Hsieh; Tseng-Yi Chen; Cheng-Yu Chen; Chia-Lin Yang; Hsiang-Yun Cheng ; Yixin Luo | ||||
2021 | Future Computing Platform Design: A Cross-Layer Design Approach | Hsiang-Yun Cheng ; Chun-Feng Wu; Christian Hakert; Kuan-Hsun Chen; Yuan-Hao Chang; Jian-Jia Chen; Chia-Lin Yang; Tei-Wei Kuo | ||||
2018 | LIRS: Enabling efficient machine learning on NVM-based storage via a lightweight implementation of random shuffling | Zhi-Lin Ke; Hsiang-Yun Cheng; Chia-Lin Yang | Computing Research Repository | |||
2010 | Memory Latency Reduction via Thread Throttling | Hsiang-Yun Cheng; Chung-Hsiang Lin; Jian Li; Chia-Lin Yang | ||||
2019 | Sparse ReRAM Engine: Joint Exploration of Activation and Weight Sparsity in Compressed Neural Networks | Tzu-Hsien Yang; Hsiang-Yun Cheng ; Chia-Lin Yang; I-Ching Tseng; Han-Wen Hu; Hung-Sheng Chang; Hsiang-Pang Li | ||||
2019 | The Impact of Emerging Technologies on Architectures and System-level Management | Jörg Henkel; Hussam Amrouch; Martin Rapp; Sami Salamin; Dayane Reis; Di Gao; Xunzhao Yin; Michael Niemier; Cheng Zhuo; X. Sharon Hu; Hsiang-Yun Cheng ; Chia-Lin Yang |