| Issue Date | Title | Author(s) | Relation | scopus | WOS | Fulltext/Archive link |
|---|---|---|---|---|---|---|
| 2014 | Utilizing Sub-5 nm Sidewall Electrode Technology for Atomic-Scale Resistive Memory Fabrication | Kai-Shin Li; ChiaHua Ho; Ming-Taou Lee; Min-Cheng Chen; Cho-Lun Hsu; J. M. Lu; C. H. Lin; C. C. Chen; B. W. Wu; Y. F. Hou; C. Yi. Lin; Y. J. Chen; T. Y. Lai; M. Y. Li; I. Yang; C. S. Wu; Fu-Liang Yang |
